Using a pin to signal another pin

@yurkshirelad

You're right, this is an assembler implementation of an interrupt. I believe you can do the same thing in C, but you have to use a lower priority interrupt.

Really, in C? How? Perhaps using the asm C++ directive?

@yurkshirelad I think we agree. At least that's the way they work on IBM mainframes, and I think IBM5150 (PC)

Posted by: @zander

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@yurkshirelad

You're right, this is an assembler implementation of an interrupt. I believe you can do the same thing in C, but you have to use a lower priority interrupt.

Really, in C? How? Perhaps using the asm C++ directive?

I believe using esp_intr_alloc(). I find the documentation is confusing and contradictory, but perhaps I don't understand it:

High-priority interrupts can be allocated using esp_intr_alloc() but requires the handlers to be written in Assembly, see High Priority Interrupts. Edge-triggered low- and medium-priority interrupts can also be allocated using esp_intr_alloc(), but are not used often since most peripheral interrupts are level-triggered.

I've been trying to find a good example, but I only get hits for Espressif's documentation.

You might be better off using FreeRTOS instead, as it supports inter process communications.

@yurkshirelad I just tried it and yes you can write esp_intr_alloc() in an esp32 sketch. It threw a lot of errors because I didn't provide any parameters. I am not at all surprised the ISR needs to be in assembler though.

All good stuff, but none of this answers the premise of @dw of how to create an ISR using a hardware register rather than a hardware pin.

Posted by: @zander

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@yurkshirelad I just tried it and yes you can write esp_intr_alloc() in an esp32 sketch. It threw a lot of errors because I didn't provide any parameters. I am not at all surprised the ISR needs to be in assembler though.

All good stuff, but none of this answers the premise of @dw of how to create an ISR using a hardware register rather than a hardware pin.

Yeah, I was hoping that this discussion and research would help find the answer. Sadly, I was wrong! Sorry. There is so much I have to learn.

@yurkshirelad Maybe, but I am going to try to create my own poor man's version. In order to handle comms with no chance of data loss requires a pre-emptive multi-tasking approach. The common co-operative approach is not able to do that and even pre-emptive eventually runs out of resource but then I would add outboard MCU like an RP2040 to handle multiple lines and create a big bufered pipe between the main processor and the outboard line handlers. That is what the Intel 8089 chip did, and what IBM stand alone channel processors did. I think on the ticker plant we used Z80's on the line handlers.

@yurkshirelad A while ago I went down the interrupt rabbit hole. Unfortunately due to my brain damage I remember only a few high level ideas, but I do remember there are several levels where they can be handled.